tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 4

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

(10) 10-bit A/D converter (with S/H): 32 channels
(21) Package
(11) Watchdog timer: 1 channel
(12) Chip select/ wait controller: 6 channels
(13) Interrupt function
(14) Input and output ports: 212 pins
(15) Standby function
(16) Clock generator
(17) Endian: Bi-endian (big-endian/little-endian)
(18) Operating frequency
(20) Temperature range
(19) Operating voltage range
Big endian
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Little endian
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Upper address 31
Lower address
Upper address 31
Lower address
An optional trigger by the internal timer
Fixed channel/scan mode
Single/repeat mode
Top-priority conversion mode
Timer monitor function
1.7usec@27MHz (at 54MHz) 1.15usec@40MHz (at 40MHz)
(Consists of 2 units. Capable of simultaneous conversion. No definition for error between
units)
CPU: 2 factors …software interrupt instruction
External: 16 factors…The order of precedence can be set over 7 levels.
Two stand-by modes (IDLE, STOP )
Built-in PLL (multiplication by 4)
Clock gear function: The high-speed clock can be divided into 1/1, 1/2，1/4, 1/8.
The most significant byte is 0 (bit 31-24).
The address of the most significant byte specifies the word address.
The least significant byte is 0 (bit 7-0).
The address of the least significant byte specifies the word address.
54MHz (DVCC15 = 1.35V-1.65V)
Core: 1.35 - 1.65V
I/O: 1.65 - 3.3 V
ADC: 2.7 - 3.3 V
-20°C-85°C
0°C -70°C（Flash W/E）
P-TFBGA289 (11mm×11mm, 0.5mm pitch)
Internal 83 factors…The order of precedence can be set over 7 levels
11
8
4
0
7
3
(Except for NMI interrupt)
4 factors, which are KWUP, are united as an interrupt factor.
24 23
24 23
(except the watchdog timer interrupt)
39- independent-interrupt factors are included.
TMP19A61(rev 1.0)-1-3
10
9
5
1
6
2
16 15
16 15
10
6
2
9
5
1
8 7
8 7
11
7
3
8
4
0
0
0
Word address
Word address
TMP19A61
8
4
0
8
4
0