tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 320

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

(The TMRB7 timer output (internal TB7OUT) is used with the timer input clock set to φ T0.)
fc [MHz]
(Note) This table shows the case where the system clock is set to fc, the clock gear is set to fc/1,
19.6608
29.4912
24.576
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
TB7RG0H/L
and the prescaler clock is set to f
(Note 1) In the I/O interface mode, the TMRB7 timer output signal cannot be used internally
as the transfer clock.
(Note 2) This table shows the case where the system clock is set to fc, the clock gear is set
to fc/1, and the prescaler clock is set to f
Transfer rate =
Divide ratio N
(Set to BR0CR<BR0S3:0>)
Baud rate calculation to use the TMRB7 timer:
000AH
0001H
0002H
0003H
0004H
0005H
0006H
0008H
0010H
0014H
(Using the baud rate generator with BR0CR <BR0ADDE> = 0)
fc
Clock frequency selected by SYSCR0<PRCK1:0>
29.4912
Table 13.3.2.1 Selection of UART Baud Rate
Table 13.3.2.2 Selection of UART Baud Rate
MHz
230.4
115.2
46.08
23.04
11.52
76.8
57.6
38.4
28.8
14.4
A
C
1
2
4
8
0
5
1
2
3
4
6
TMP19A61 (rev1.0)-13-319
24.576
MHz
Input clock
38.4
19.2
192
9.6
96
64
48
32
24
12
TB7REG×2×16
periph
/2.
periph
MHz
187.5
93.75
46.88
31.25
23.44
18.75
11.72
62.5
37.5
9.38
24
/4.
(fc/4)
φ T1
307.200
153.600
460.800
230.400
153.600
115.200
( When input clock to the timer TMRB7 is φ T0 )
76.800
38.400
19.200
76.800
38.400
76.800
38.400
19.6608
MHz
153.6
30.72
15.36
76.8
51.2
38.4
25.6
19.2
7.68
9.6
(fc/16)
φ T4
115.200
76.800
38.400
19.200
19.200
57.600
38.400
28.800
19.200
9.600
4.800
9.600
9.600
MHz
41.67
31.25
20.83
15.63
62.5
12.5
7.81
6.25
125
16
25
(fc/64)
φ T16
TMP19A61
19.200
28.800
14.400
9.600
4.800
2.400
1.200
4.800
2.400
9.600
7.200
4.800
2.400
12.288
MHz
19.2
9.6
4.8
96
48
32
24
16
12
6
Unit: (kbps)
Unit: (kbps)
(fc/256)
φ T64
4.800
2.400
1.200
0.600
0.300
1.200
0.600
7.200
3.600
2.400
1.800
1.200
0.600