tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 41

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tmp19a61f10xbg

Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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6.2
6.3
(Note) If exception vector addresses are to be placed in internal ROM, set the status bit <BEV> of
The starting address of an exception handler is defined to be "exception vector address." The exception
vector address for a reset exception and non-maskable interrupts is 0xBFC0_0000. The exception
vector address for a debug exception can be either 0xBFC0_0480 (EJTAG ProbEn = 0) or
0xFF20_0200 (EJTAG ProbEn = 1) depending on the internal signal <ProbeEn>. For other exceptions,
the corresponding exception vector addresses are determined depending on the values of Status
<BEV> and Cause <IV> of the system control coprocessor register (CP0).
A reset exception is generated by either setting the external reset pin to "L" or counting the WDT beyond
a "reset" count. When a reset exception is generated, peripheral hardware registers and the CP0
register are initialized and it jumps to the exception vector address 0xBFC0_0000. The PC value of
reset exception generation will be stored in ErrorEPC of the CP0 register.
Since a reset exception causes to set the status bit <ERL> of the CP0 register to "1" disabling interrupt
requests, the Status <ERL> bit must be cleared to "0" in a startup routine (reset exception handler) or by
any other means if interrupts are to be used.
Refer to the section "Exception Handling, Reset Exception" of the separate volume "TX19A Core
Architecture" for detailed operation upon generation of reset exception.
Exception Vector
Reset Exception
the system control coprocessor register (CP0) to "1."
Reset, NMI
Debug exceptions (En=0) 0xBFC0_0480 0xBFC0_0480
Debug exceptions (En=1) 0xFF20_0200 0xFF20_0200
Interrupts (IV=0)
Interrupts (IV=1)
Other exceptions
Table 6.1 Exception Vector Table (Virtual Address)
Exception
TMP19A61(rev1.0)-6-40
0xBFC0_0000 0xBFC0_0000
0x8000_0180 0xBFC0_0380
0x8000_0200 0xBFC0_0400
0x8000_0180 0xBFC0_0380
BEV=0
BEV=1
TMP19A61

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