tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 499

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tmp19a61f10xbg

Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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Pause-IR
In the Pause-IR state, the shift operation performed by the instruction register is temporarily
suspended. The existing state of the instruction register and that of the data register are
maintained.
The TAP controller remains in the Pause-IR state while TMS is "0." If "1" is input into TMS, it goes
into the Exit 2-IR state.
Exit 2-IR
The Exit 2-IR state of the TAP controller is a transient state.
If "0" is input into TMS when the TAP controller is in the Exit 2-IR state, the TAP controller goes
into the Shift-IR state. If "1" is input into TMS, it goes into the Update-IR state.
Update-IR
In the Update-IR state, instructions shifted into the instruction register are updated by outputting
them in a parallel fashion synchronously to the rising edge of TCK.
If "0" is input into TMS when the TAP controller is in the Update-IR state, the TAP controller goes
into the Run-Test/Idle state. If "1" is input into TMS, it goes into the Select-DR-Scan state.
Table 21.2 shows the boundary scan sequence relative to processor signals.
TMP19A61 (rev1.0)21-498
TMP19A61

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