tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 204

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Fig. 8.3 Read Operation Timing Diagram (0 Wait and 1 Wait Automatically Inserted)
(2) Wait timing
Fig. 8.4 Read Operation Timing Diagram (5 Waits Automatically Inserted)
Fig. 8.3 through Fig. 8.10 shows the timing diagrams in which waits have been inserted.
A wait cycle can be inserted for each block by using the chip selector (CS) and wait
controller. The following three types of wait can be inserted:
A wait can be inserted via the RDY pin
A［23:0］
D[15:0]
RD
A［23:0］
D[15:0]
RD
A wait of up to 15 clocks can be automatically inserted.
A wait can be inserted via the WAIT pin
(2+2N through 15+2N
(2+2N through 15+2N
Note: 2N is the number of external waits that can be inserted.)
The setting of the number of waits to be automatically inserted and the setting of the
external wait input can be made using the chip selector and wait controller registers,
BmnCS<BnW>.
Note: 2N is the number of external waits that can be inserted.)
tsys
address
0 wait
TMP19A61(rev1.0)-8-203
tsys
data
address
5 waits
1 wait
data
address
data
TMP19A61