tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 327

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

13.3.11 Transmit Buffer
The transmit buffer (SC0BUF) is in a dual structure. The double buffering function may be
enabled or disabled by setting the double buffer control bit <WBUF> in serial mode control
register 2 (SC0MOD2). If double buffering is enabled, data written to Transmit Buffer 2
(SCOBUF) is moved to Transmit Buffer 1 (shift register).
If the transmit FIFO has been disabled (SCOFCNF <CNFG> = 0 or 1 and <FDPX1:0> = 01),
the INTTX interrupt is generated at the same time and the transmit buffer empty flag
<TBEMP> of SC0MOD2 is set to "1." This flag indicates that transmit buffer 2 is now empty
and that the next transmit data can be written. When the next data is written to transmit
buffer 2, the <TBEMP> flag is cleared to "0."
If the transmit FIFO has been enabled (SCNFCNF <CNFG> = 1 and <FDPX1:0> = 10/11),
any data in the transmit FIFO is moved to the transmit buffer 2 and <TBEMP> flag is
immediately cleared to "0." The CPU writes data to transmit buffer 2 or to the transmit FIFO.
If the transmit FIFO is disabled in the I/O interface SCLK input mode and if no data is set in
transmit buffer 2 before the next frame clock input, which occurs upon completion of data
transmission from transmit buffer 1, an under-run error occurs and a serial control register
(SC0CR) <PERR> parity/under-run flag is set.
If the transmit FIFO is enabled in the I/O interface SCLK input mode, when data
transmission from transmit buffer 1 is completed, the transmit buffer 2 data is moved to
transmit buffer 1 and any data in transmit FIFO is moved to transmit buffer 2 at the same
time.
If the transmit FIFO is disabled in the I/O interface SCLK output mode, when data in
transmit buffer 2 is moved to transmit buffer 1 and the data transmission is completed, the
SCLK output stops. So, no under-run errors can be generated.
If the transmit FIFO is enabled in the I/O interface SCLK output mode, the SCLK output
stops upon completion of data transmission from transmit buffer 1 if there is no valid data in
the transmit FIFO.
If double buffering is disabled, the CPU writes data only to transmit buffer 1 and the transmit
interrupt INTTX is generated upon completion of data transmission.
If handshaking with the other side is necessary, set the double buffer control bit <WBUF> to
"0" (disable) to disable transmit buffer 2; any setting for the transmit FIFO should not be
performed.
Note) In the I/O interface SCLK output mode, the SC0CR <PEER> flag is
insignificant. In this case, the operation is undefined. Therefore, to switch
from the SCLK output mode to another mode, SC0CR must be read in
advance to initialize the flag.
TMP19A61 (rev1.0)-13-326
TMP19A61