tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 314

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

13 Serial Channel (SIO)
13.1
Features
As the SIOs 0 to SIO8 operate in the same way, only SIO0 is described here.
This device has nine serial I/O channels: SIO0 to SIO8. Each channel operates in either the UART
mode (asynchronous communication) or the I/O interface mode (synchronous communication)
which is selected by the user.
I/O interface mode
associated synchronization signals (SCLK) to extend I/O.
Asynchronous (UART) mode:
In the above modes 1 and 2, parity bits can be added. The mode 3 has a wakeup function in which
the master controller can start up slave controllers via the serial link (multi-controller system). Fig.
13.2.1 shows the block diagram of SIO0.
Each channel consists of a prescaler, a serial clock generation circuit, a receive buffer, its control
circuit, a transmit buffer and its control circuit. Each channel functions independently.
• Mode 0 (I/O inerface mode) /LSB first
• Mode 0 (I/O inerface mode) /MSB first
• Mode 1 (7-bit UART mode)
Without parity
With parity
Without parity
With parity
• Mode 2 (8-bit UART mode)
• Mode 3 (9-bit UART mode)
bit 0
bit 7
start
start
start
start
start
start
Transmission direction
Transmission direction
bit 8=1, represents address (select code).
bit 8=0, represents data.
bit 0
bit 0
bit 0
bit 0
bit 0
bit 0
6
1
5
2
1
1
1
1
1
1
TMP19A61 (rev1.0)-13-313
4
3
2
2
2
2
2
2
Fig. 13.1 Data format
4
3
3
3
3
3
3
3
Mode 0: This is the mode to transmit and receive I/O and
Mode 1: TX/RX Data Length: 7 bits
Mode 2: TX/RX Data Length: 8 bits
Mode 3: TX/RX Data Length: 9 bits
5
2
4
4
4
4
4
4
6
1
5
5
5
5
5
5
6
6
6
6
6
6
7
0
stop
parity
7 7
7
7
7
stop
stop
parity
bit 8
8
stop
stop
Stop (Wake-up)
TMP19A61