tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 304
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tmp19a61f10xbg
Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A61F10XBG.pdf
(575 pages)
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Part Number:
TMP19A61F10XBG
Manufacturer:
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12.2.4
12.2.5
By performing sampling, this circuit detects the input edge of an external capture input (TCnIN).
It can be set to "rising edge," "falling edge," "both edges" or "not captured" by provisioning the
capture control register CAPAnCR<CPnEG1:0>. Fig. 12.2.4.1 shows capture inputs, outputs
(capture factor outputs) produced by the edge detection circuit.
This is a 32-bit register for capturing count values of TBTA by using capture factors as triggers. If
(n=A1, B0 and B1)
(
(
(Both-edge setting)
(Not captured setting)
a capture operation is performed, the capture interrupt INTCAPn is generated. Three interrupt
requests INTCAPA 1 , INTCAPB0 and INTCAPB1 are grouped into one set of interrupt
requests which are then notified to the interrupt controller. Which one of interrupt requests must
be processed can be identified by reading the status register TCGST during interrupt
processing. Additionally, it is possible to mask unnecessary interrupts by setting the interrupt
mask register TCGIM to an appropriate bit setting. While a read of the capture register is
ongoing, count values cannot be captured even if there are triggers.
Rising edge setting
Falling edge setting
Capture factor
TCnIN input
Edge Detection Circuit
32-bit Capture Register
(Note) TMP19A61 groups the following three capture interrupts into one set of
interrupt requests.
INTCAPA1, INTCAPB0, INTCAPB1
INTCAPA0 is assigned to interrupt No. 36 as an independent interrupt.
)
Fig. 12.2.4.1 Capture Inputs and Capture Factor Outputs
)
(Outputs Produced by the Edge Detection Circuit)
TMP19A61 (rev1.0)-12-303
TMP19A61
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