tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 566

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Internal clock
24.8 Transfer with DMA Request
GCLKIN
DREQn
AD[15:0]
ALE
HWR
LWR
CS
R/W
GBSTART
GACK
1) Indicates the condition under which Nth transfer is performed successfully.
2) Indicates the condition under which (N+1) th transfer is not performed.
内部的には
The following shows an example of a transfer between the on-chip RAM and an external device
in multiplex bus mode.
The following shows transfer operation timing of the on-chip RAM to an external bus during
write operation (memory-to-memory transfer).
・ 16-bit data bus width, non-recovery time
・ Level data transfer mode
・ Transfer size of 16 bits, device port size (DPS) of 16 bits
・ Source/destination: on-chip RAM/external device
(N-1) transfer
Add
1) tDREQ_w
2Clk
1) tDREQ_r
Data
TMP19A61 (rev 1.0)-24-565
2) tDREQ_w
Add
N transfer
2) tDREQ_r
2Clk
Data
(N+1) transfer
Add
TMP19A61
Data