tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 280

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

11.2.4 Capture Registers (TBxxCP0H/L, TBxxCP1H/L)
11.2.5 Capture
11.2.6 Comparators (CP0, CP1)
11.2.7 Timer Flip-flop (TBxxFF0)
These are 16-bit registers for latching values from the UC0 up-counter. The data in the
capture register must be read out in the order of low-order bits followed by high-order bits by
using the 1 byte data transfer instruction twice.
This is a circuit that controls the timing of latching values from the UC0 up-counter into the
TBxxCP0 and TBxxCP1 capture registers. The timing with which to latch data is specified
by TBxxMOD<TB0CPM1:0>.
Software can also be used to import values from the UC0 up-counter into the capture
register; specifically, UC0 values are taken into the TBxxCP0 capture register each time “0”
is written to TBxxMOD<TB0CP0>. To use this capability, the prescaler must be running
(TBxxRUN<TB0PRUN> =“1”).
In the two-phase pulse count mode (for the TMRB0C), the counter value is captured by
using software.
These are 16-bit comparators for detecting a match by comparing set values of the UC0
up-counter with set values of the TBxxRG0 and TBxxRG1 timer registers. If a match is
detected, INTTB0 is generated.
The timer flip-flop (TBxxFF0) is reversed by a match signal from the comparator and a latch
signal to the capture registers. It can be enabled or disabled to reverse by setting the
TBxxFFCR<TB0C1T1, TB0C0T1, TB0E1T1, TB0E0T1>.
The value of TBxxFF0 becomes undefined after a reset. The flip-flop can be reversed by
writing “00” to TB0FFCR<TB0FF0C1:0>. It can be set to “1” by writing “01,” and can be
cleared to “0” by writing “10.”
The value of TBxxFF0 can be output to the timer output pin, TBxxOUT (shared with a port).
To enable timer output, the port related registers PxCR and PxFC1 must be programmed
beforehand.
(Note 1) Although a read of low-order 8 bits in the capture register suspends the
(Note 2) If the timer stops after a read of low-order 8 bits, the capture operation
(Do not read out the data while executing 2 bytes transfer instruction.)
capture operation, it is resumed by successively reading high-order 8 bits.
remains suspended even after the timer restarts. Please do not stop the
timer after a read of low-order 8 bits.
TMP19A61 (rev 1.0)11-279
TMP19A61