tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 325

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tmp19a61f10xbg

Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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13.3.9
13.3.10 Transmit Control Unit
Transmit Counter
TXDCLK
The transmit counter is a 4-bit binary counter used in the asynchronous communication
(UART) mode. It is counted by SIOCLK as in the case of the received counter and
generates a transmit clock (TXDCLK) on every 16th clock pulse.
SIOCLK
In the SCLK output mode with SC0CR <IOC> set to “0,” each bit of data in the transmit
buffer is output to the TXD0 pin on the rising edge of the shift clock output from the
SCLK0 pin.
In the SCLK input mode with SC0CR <IOC> set to “1,” each bit of data in the transmit
buffer is output to the TXD0 pin on the rising or falling edge of the input SCLK signal
according to the SC0CR <SCLKS> setting.
When the CPU writes data to the transmit buffer, data transmission is initiated on the
rising edge of the next TXDCLK and the transmit shift clock (TXDSFT) is also generated.
I/O interface mode
Asynchronous (UART) mode:
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Fig. 13.3.9.1 Transmit Clock Generation
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