tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 411

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tmp19a61f10xbg

Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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<TRX>
1
0
<AL>
1
0
1
0
<AAS> <AD0>
1
1
0
1
0
1
0
1/0
1/0
1/0
Table 15.6.3.4 Processing in Slave Mode
0
0
0
0
TMP19A61
Arbitration was lost while the slave
address was being transmitted, and
the SBI received a slave address with
the direction bit "1" transmitted by
another master.
In the slave receiver mode, the SBI
received a slave address with the
direction bit "1" transmitted by the
master.
In the slave transmitter mode, the SBI
has completed a transmission of one
data word.
Arbitration was lost while a slave
address was being transmitted, and
the SBI received either a slave
address with the direction bit "0" or a
general-call address transmitted by
another master.
Arbitration was lost while a slave
address or a data word was being
transmitted,
terminated.
In the slave receiver mode, the SBI
received either a slave address with
the direction bit "0" or a general-call
address transmitted by the master.
In the slave receiver mode, the SBI
has completed a reception of a data
word.
(
and
State
rev1.0
the
)
-15-410
transfer
Set the number of bits in a data word to
<BC2:0> and write the transmit data
into SBI0DBR.
Test LRB. If it has been set to "1," that
means the receiver does not require
further data. Set <PIN> to 1 and reset
<TRX> to 0 to release the bus.
<LRB> has been reset to "0," that
means the receiver requires further
data. Set the number of bits in the data
word to <BC2:0> and write the transmit
data to the SBIDBR.
Read the SBIDBR (a dummy read) to
set <PIN> to 1, or write "1" to <PIN>.
Set the number of bits in the data word
to <BC2:0> and read the received data
from SBIDBR.
Processing
TMP19A61
If

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