tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 316

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

13.3
13.3.1
The serial interface baud rate generator uses four different clocks, i.e., φ T1, φ T4, φ T16 and φ T64, supplied from
the prescaler output clock.
0 (fgear)
1 (fc)
peripheral
<FPSEL>
Clear
clock
(Note 1)
fsys/2” is satisfied (so that φTn is slower than fsys/2).
(Note 2)
(Note 3)
Operation of Each Circuit (Channel 0)
Prescaler
<GEAR2:0>
Clock gear
100(fc/2)
110(fc/4)
100(fc/2)
110(fc/4)
111(fc/8)
111(fc/8)
000(fc)
000(fc)
The device includes a 7-bit prescaler to generate necessary clocks to drive SIO0. The input
clock φ T0 to the prescaler is selected by SYSCR of CG <PRCK1:0> to provide the frequency
of fperiph/2, fperiph/4, fperiph/8, or fperiph/16.
The clock frequency fperiph is either the clock “fgear,” to be selected by SYSCR1<FPSEL> of
CG, or the clock “fc” before it is divided by the clock gear.
The prescaler becomes active only when the baud rate generator is selected for generating
the serial transfer clock. Table 13.3.1 lists the prescaler output clock resolution.
value
Table 13.3.1 Input Clock Resolution to the Baud Rate Generator @fc = 54MHz
The prescaler output clock φTn must be selected so that the relationship “φTn <
Do not change the clock gear while SIO is operating.
The horizontal lines in the above table indicate that the setting is prohibited.
00(fperiph/16)
01(fperiph/8)
10(fperiph/4)
11(fperiph/2)
00(fperiph/16)
01(fperiph/8)
10(fperiph/4)
11(fperiph/2)
00(fperiph/16)
01(fperiph/8)
10(fperiph/4)
11(fperiph/2)
00(fperiph/16)
01(fperiph/8)
10(fperiph/4)
11(fperiph/2)
00(fperiph/16)
01(fperiph/8)
10(fperiph/4)
11(fperiph/2)
00(fperiph/16)
01(fperiph/8)
10(fperiph/4)
11(fperiph/2)
00(fperiph/16)
01(fperiph/8)
10(fperiph/4)
11(fperiph/2)
00(fperiph/16)
01(fperiph/8)
10(fperiph/4)
11(fperiph/2)
Prescaler clock
<PRCK1 : 0>
selection
TMP19A61 (rev1.0)-13-315
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
5
4
3
2
6
5
4
3
7
6
5
4
8
7
6
5
5
4
3
2
5
4
3
5
4
5
(0.6μs)
(0.3μs)
(0.15μs)
(0.07μs)
(1.2μs)
(0.6μs)
(0.3μs)
(0.15μs)
(2.4μs)
(1.2μs)
(0.6μs)
(0.3μs)
(4.7μs)
(2.4μs)
(1.2μs)
(0.6μs)
(0.6μs)
(0.3μs)
(0.15μs)
(0.07μs)
(0.6μs)
(0.3μs)
(0.15μs)
(0.6μs)
(0.3μs)
(0.6μs)
φT1
-
-
-
-
-
-
Prescaler output clock resolution
fc/2
fc/2
fc/2
fc/2
Fc/2
Fc/2
Fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
7
6
5
4
5
9
8
7
6
10
9
8
7
7
6
5
4
7
6
5
4
7
6
5
4
7
6
5
(2.4μs)
(1.2μs)
(0.6μs)
(0.3μs)
8
7
6
(0.6μs)
(9.5μs)
(4.7μs)
(2.4μs)
(1.2μs)
(9.5μs)
(4.7μs)
(2.4μs)
(2.4μs)
(1.2μs)
(0.6μs)
(0.3μs)
(2.4μs)
(1.2μs)
(0.6μs)
(0.3μs)
(2.4μs)
(1.2μs)
(0.6μs)
(0.3μs)
(2.4μs)
(1.2μs)
(0.6μs)
(4.7μs)
(2.4μs)
(1.2μs)
(19.0μs)
φT4
-
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
9
8
7
6
10
9
8
7
11
10
9
8
12
11
10
9
9
8
7
6
9
8
7
6
9
8
7
6
9
8
7
6
(9.5μs)
(4.7μs)
(2.4μs)
(1.2μs)
(9.5μs)
(4.7μs)
(2.4μs)
(9.5μs)
(4.7 μs)
(9.5μs)
(9.5μs)
(4.7μs)
(2.4μs)
(1.2μs)
(9.5μs)
(4.7μs)
(2.4μs)
(1.2μs)
(9.5μs)
(4.7μs)
(2.4μs)
(1.2μs)
(9.5μs)
(4.7μs)
(2.4μs)
(1.2μs)
φT16
(19.0μs)
(37.9μs)
(19.0μs)
(75.9μs)
(37.9μs)
(19.0μs)
TMP19A61
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
11
10
9
8
12
11
10
9
13
12
11
10
14
13
12
11
11
10
9
8
11
10
9
8
11
10
9
8
11
10
9
8
(9.5μs)
(4.7μs)
(9.5μs)
(9.5μs)
(4.7μs)
(9.5μs)
(4.7μs)
(9.5μs)
(4.7μs)
(9.5μs)
(4.7μs)
(37.9μs)
(19.0μs)
(75.9μs)
(37.9μs)
(19.0μs)
(152μs)
(75.9μs)
(37.9μs)
(19.0μs)
(303μs)
(152μs)
(75.9μs)
(37.9μs)
(37.9μs)
(19.0μs)
(37.9μs)
(19.0μs)
(37.9μs)
(19.0μs)
(37.9μs)
(19.0μs)
φT64