tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 248

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tmp19a61f10xbg

Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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DARn
(0xFFFF_E20CH)
(0xFFFF_E22CH)
(0xFFFF_E24CH)
(0xFFFF_E26CH)
(0xFFFF_E28CH)
(0xFFFF_E2ACH)
(0xFFFF_E2CCH)
(0xFFFF_E2ECH)
10.3.6 Destination Address Register (DARn)
31 : 0
Bit
Mnemonic
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
DAddr
Destination address
DAddr15
DAddr23
DAddr31
DAddr7
Fig. 10.8 Destination Address Register (DARn)
Field name
15
23
31
7
TMP19A61 (rev1.0)10-247
DAddr22
DAddr30
DAddr14
DAddr6
14
22
30
6
Destination Address (initial value: − )
Specifies the address of the destination to which data is transferred
using a physical address. This address changes according to the
DAC and TrSiz settings of CCRn and the DACM setting of DTCRn.
DAddr13
DAddr21
DAddr29
DAddr5
13
21
29
5
See detailed description
See detailed description
See detailed description
See detailed description
DAddr12
DAddr20
DAddr28
DAddr4
12
20
28
4
Indeterminate
Indeterminate
Indeterminate
Indeterminate
R/W
R/W
R/W
R/W
Description
DAddr11
DAddr19
DAddr27
DAddr3
11
19
27
3
DAddr10
DAddr18
DAddr26
DAddr2
10
18
26
2
TMP19A61
DAddr17
DAddr25
DAddr1
DAddr9
17
25
1
9
DAddr16
DAddr24
DAddr0
DAddr8
16
24
0
8

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