tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 431
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tmp19a61f10xbg
Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A61F10XBG.pdf
(575 pages)
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Part Number:
TMP19A61F10XBG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
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ADAREG6EL
(0xFFFF_F80C)
ADAREG6EH
(0xFFFF_F80D)
ADAREG7FL
(0xFFFF_F80E)
ADAREG7FH
(0xFFFF_F80F)
•
•
•
•
converted value is stored. A read of a lower register (ADAREGxL) will set this bit to "0."
both conversion result storage registers (ADAREGxH,ADAREGxL) are read. A read of a flag will clear this bit to "0."
Values read from bits 5 through 2 of ADAREG6EL/ADAREG7FL are always "1."
Bit 0 of ADAREG6EL/ADAREG7FL is the A/D conversion result storage flag <ADRxRF>. It is set to "1" if an A/D
Bit 1 of ADAREG6EL/ADAREG7FL is the over Run flag <OVRx>. It is set to "1" if a conversion result is overwritten before
When reading conversion result storage registers, first read upper registers and then read lower registers.
Converted channel x value
bit Symbol
Read/Write
After reset
bit Symbol
Read/Write
After reset
bit Symbol
Read/Write
After reset
bit Symbol
Read/Write
After reset
Function
Function
Function
Function
A/D conversion result
A/D conversion result
ADR61
Store lower 2 bits of
ADR69
ADR71
Store lower 2 bits of
ADR79
7
7
7
7
Lower A/D Conversion Result Register 6E
Upper A/D Conversion Result Register 6E
Lower A/D Conversion Result Register 7F
Upper A/D Conversion Result Register 7F
0
ADAREGxH
R
R
0
9
ADR60
ADR68
ADR70
ADR78
7
TMP19A61 (rev1.0)16-430
6
6
6
6
8
6
7
5
"1" is read.
"1" is read.
ADR67
ADR77
4
Store upper 8 bits of A/D conversion result
Store upper 8 bits of A/D conversion result
6
5
5
5
5
3
5
2
4
ADR66
ADR76
1
4
4
4
4
3
0
R
R
R
R
1
0
1
0
2
ADR65
ADR75
1
7
3
3
3
3
6
0
5
ADR64
ADR74
2
2
2
2
4
TMP19A61
3
Over RUN
0: Not
1: Generate
Over RUN
0: Not
1: Generate
ADR63
ADR73
2
OVR6
flag
generate
OVR7
flag
generate
R
R
ADAREGxL
1
0
1
1
0
1
1
0
A/D
conversion
result storage
flag
1: Presence
A/D
conversion
result storage
flag
1: Presence
ADR6RF
ADR7RF
ADR62
ADR72
of
conversion
result
of
conversion
result
0
R
0
0
R
0
0
0
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