tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 394

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tmp19a61f10xbg

Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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15.2 Control
15.3 I
(a)
(b)
(c)
Note)
2
C Bus Mode Data Formats
The following registers control the serial bus interface and provide its status information for
monitoring.
Serial bus interface control register 0 (SBI0CR0)
Serial bus interface control register 1 (SBI0CR1)
Serial bus interface control register 2 (SBI0CR2)
Serial bus interface buffer register (SBI0DBR)
I
Serial bus interface status register (SBI0SR)
Serial bus interface baud rate register 0 (SBI0BR0)
The functions of these registers vary, depending on the mode in which the SBI is operating. For
a detailed description of the registers, refer to "15.5 Control in the I
Control in the Clock-synchronous 8-bit SIO Mode."
Fig. 15.3 shows the data formats used in the I
Addressing format
Addressing format (with repeated start condition)
Free data format (master-transmitter to slave-receiver)
2
R
C bus address register (I2CAR)
ACK: Acknowledge bit
/
W
S
S
S
S: Start condition
P: Stop condition
: Direction bit
Slave address
Slave address
8 bits
8 bits
8 bits
Data
Once
Once
Once
Fig. 15.3 I
W
W
R
R
/
/
C
C
C
A
K
A
K
A
K
1
1
1
TMP19A61
1 to 8 bits
1 to 8 bits
1 to 8 bits
2
Repeated
C Bus Mode Data Formats
Data
Data
Data
(
rev1.0
Repeated
Repeated
A
C
K
A
C
K
A
C
K
1
1
1
2
)
S
C bus mode.
-15-393
1 to 8 bits
1 to 8 bits
Slave address
Data
Data
8 bits
Once
W
C
R
C
1
A
K
1
A
K
/
P
A
C
K
P
1
2
C Bus Mode" and "15.7
TMP19A61
1 to 8 bits
Repeated
Data
A
C
K
1
P

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