tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 413

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

15.6.5
(Note)
SCL (bus)
SCL pin
SDA pin
<LRB>
<BB>
<PIN>
Repeated Start Procedure
Do not write <MST> to "0" when it is "0." (Repeated start cannot be done.)
Repeated start is used when a master device changes the data transfer direction without
terminating the transfer to a slave device. The procedure of generating a repeated start in
the master mode is described below.
First, set SBI0CR2 <MST, TRX, BB> to "0" and write "1" to <PIN> to release the bus. At
this time, the SDA pin is held at the "H" level and the SCL pin is released. Because no stop
condition is generated on the bus, other devices think that the bus is busy. Then, test
SBI0SR <BB> and wait until it becomes "0" to ensure that the SCL pin is released. Next,
test <LRB> and wait until it becomes "1" to ensure that no other device is pulling the SCL
bus line to the "L" level. Once the bus is determined to be free this way, use the steps
described above in (2) to generate the start condition.
To satisfy the setup time of repeated start, at least 4.7-μs wait period (in the standard
mode) must be created by the software after the bus is determined to be free.
(Note)
SBI0CR2 ← 0 0 0 1 1 0 0 0
if SBI0SR<BB> ≠ 0
Then
if SBI0SR<LRB> ≠ 1
Then
4.7 μ s Wait
SBI0CR1 ← X X X 1 0 X X X
SBI0DBR ← X X X X X X X X
SBI0CR2 ← 1 1 1 1 1 0 0 0
Fig. 15.6.5.1 Timing Chart of Generating a Repeated Start
“0” → <MST>
“0” → <TRX>
“0” → <BB>
“1” → <PIN>
7 6 5 4 3 2 1 0
9
TMP19A61
X: Don’t care
(
rev1.0
Releases the bus.
Checks that the SCL pin is released.
Checks that no other device is pulling the SCL pin to the
"L" level.
Selects the acknowledgment mode.
Sets the desired slave address and direction.
Generates the start condition.
)
-15-412
“1” → <MST>
“1” → <TRX>
“1” → <BB>
“1” → <PIN>
4.7 μ s (min)
TMP19A61
Start condition