tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 277
tmp19a61f10xbg
Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A61F10XBG.pdf
(575 pages)
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TMP19A61F10XBG
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TMP19A61
11.2 Description of Operations for Each Circuit
11.2.1 Prescaler
There is a 5-bit prescaler for acquiring the TMRB14 clock source. The prescaler input clock
φT0 is fperiph/2, fperiph/4, fperiph/8 or fperiph/16 selected by SYSCR0<PRCK1:0> in the
CG. The peripheral clock, fperiph, is either fgear, a clock selected by SYSCR1<FPSEL> in
the CG, or fc, which is a clock before it is divided by the clock gear.
The operation or the stoppage of a prescaler is set with TB14RUN<TB14PRUN> where
writing “1” starts counting and writing “0” clears and stops counting. Table 11.2.1 shows
prescaler output clock resolutions.
TMP19A61 (rev 1.0)11-276
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