tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 412

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tmp19a61f10xbg

Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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15.6.4
Generating the Stop Condition
When SBI0SR <BB> is "1," writing "1" to SBI0CR2 <MST, TRX, PIN> and "0" to <BB>
causes the SBI to start a sequence for generating the stop condition on the bus. Do not
alter the contents of <MST, TRX, BB, PIN> until the stop condition appears on the bus.
If another device is holding down the SCL bus line, the SBI waits until the SCL line is
released. After that, the SDA pin goes high, causing the stop condition to be generated.
SBI0CR2 ← 1 1 0 1 1 0 0 0
“1” → <MST>
“1” → <TRX>
“0” → <BB>
“1” → <PIN>
SCL pin
SDA pin
<PIN>
<BB> (read)
7 6 5 4 3 2 1 0
Fig. 15.6.4.1 Generating the Stop Condition
TMP19A61
(
rev1.0
Generates the stop condition.
)
-15-411
Stop condition
TMP19A61

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