tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 541

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

DSU protecting is released by setting DSU protecting mode register SEQMOD<DSUOFF>“0" and writing
protecting code “0x0000_00C5" in DSU protecting control register SEQCNT. Moreover, DSU protecting
function can be set again by similarly setting ROM protecting mode register SEQMOD<DSUOFF>“1" and
writing protecting code “0x0000_00C5" in DSU protecting control register SEQCNT.
Please note the reading data is different from original write data because of the SEQCNT register is only
for writing.
The initialization of DSU protecting register is different in the flash version and the mask version.
It provides with the power-on reset circuit in the flash version, DSU protecting register is initialized by
power-on reset, and the value doesn't usually change in reset.
It is usually initialized by reset in the mask version because power-on reset is not provided.
Please note that each reset initializes the mask.
23.5.3 DSU Protecting
23.5.4 DSU enable/ disable (enabling/ disabling debug function with DSU-PROBE)
SEQMOD<DSUOFF> Write
SEQMOD<DSUOFF>
DSU data protecting is effective the flash protecting and becomes effective at DSU protecting register
SEQMOD< DSUOFF >=“1".
After releasing reset, the DSUOFF bit is initialized by "1". It is sure to enter the state of DSU protecting in
the mask version after releasing reset because it is always effective. The condition whether to enter the
state of DSU protecting is defined depending on the state of the flash protecting.
When DSU protecting register is rewritten with ROM data protected, rewriting can be executed only
from the program put on internal ROM. Therefore, it is necessary to prepare the release program of
DSU data protecting on internal ROM.
DSUOFF bit consists of the 2 data paths to prevent the unintended release due to overdrive.
See the schematic shown below.
CLK
The access other than internal ROM is
disabled under ROM data protecting.
D
TMP19A61 (rev1.0) 23-540
Reset
SD
SEQCNT = 0x0000_00C5
Q
SEQMOD<DSUOFF> Read
Power on reset
D
Flash protecting
SD
Q
TMP19A61
DSU protecting