tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 250

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

DTCRn
(0xFFFF_E218H)
(0xFFFF_E238H)
(0xFFFF_E258H)
(0xFFFF_E278H)
(0xFFFF_E298H)
(0xFFFF_E2B8H)
(0xFFFF_E2D8H) After reset
(0xFFFF_E2F8H) Function
10.3.8 DMA Transfer Control Register (DTCRn)
5 : 3
2 : 0
Bit
Mnemonic
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
DACM
SACM
Destination
Source address count
count mode
mode
Fig. 10.10 DMA transfer control register (DTCRn)
Field name
15
23
31
7
TMP19A61 (rev1.0)10-249
address
22
30
14
6
Destination Address Count Mode
Specifies the count mode of the destination address.
000: Counting begins from bit 0
001: Counting begins from bit 4
010: Counting begins from bit 8
011: Counting begins from bit 12
100: Counting begins from bit 16
101: Setting prohibited
110: Setting prohibited
111: Setting prohibited
Source Address Count Mode
Specifies the count mode of the source address.
000: Counting begins from bit 0
001: Counting begins from bit 4
010: Counting begins from bit 8
011: Counting begins from bit 12
100: Counting begins from bit 16
101: Setting prohibited
110: Setting prohibited
111: Setting prohibited
13
21
29
5
See detailed description
DACM
R/W
12
20
28
4
0
0
0
0
Description
11
19
27
3
10
18
26
2
See detailed description
TMP19A61
SACM
R/W
17
25
1
9
16
24
0
8