tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 312

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

<CMPENn>: Controls enabling/disabling of the compare match detection.
<CMPRDEn>: Controls enabling/disabling of double buffers of the compare register.
<TCFFCn1:0>: Controls F/F of the compare match output.
<TCFFENn>: Controls enabling/disabling of F/F reversal of the compare match output.
(Note)
CMPA0CTL
(FFFFF510H)
CMPA1CTL
(FFFFF518H)
CMPACTLn bits 7 and 3~2 are read as “0”.
bit Symbol
Read/Write
After reset
bit Symbol
Read/Write
After reset
Function
Function
7
R
7
R
0
0
TMRC compare control register（CMPACTLn）
TCFF0
reverse
0:disable
1:enable
TCFF0
reverse
0:disable
1:enable
TCFFEN0
TCFFEN1
6
6
0
0
TMP19A61 (rev1.0)-12-311
Fig. 12.3.7 TMRC-related register
TCFF0 control
00:reverse
01:set
10:clear
11:Don’t care
TCFF0 control
00:reverse
01:set
10:clear
11:Don’t care
TCFFC01
TCFFC11
R/W
R/W
5
5
1
1
TCFFC00
TCFFC10
4
4
1
1
3
3
0
0
R
R
2
2
0
0
buffer 0
0:disable
1:enable
buffer 1
0:disable
1:enable
Double
Double
CMPRDE0
CMPRDE1
TMP19A61
1
1
0
0
R/W
R/W
Compare 0
enable
0:disable
1:enable
Compare 1
enable
0:disable
1:enable
CMPEN0
CMPEN1
0
0
0
0