tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 360

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

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Also, an external clock input may be used as the serial clock. The resulting baud rate
calculation is shown below:
1) UART mode
2) I/O interface mode
Baud rate calculation for an external clock input:
Baud Rate = external clock input ÷ 16
In this, the period of the external clock input must be equal to or greater than 2/fsys.
If fsys = 54 MHz, the highest baud rate will be 54 / 4 / 16 = 843.8 (kbps).
Baud rate = External clock input
When double buffering is used, it is necessary to satisfy the following relationship:
External clock input period > 6/fsys
Therefore, when fsys = 54 MHz, the baud rate must be set to a rate lower than 54 / 6
= 9 (Mbps).
When double buffering is not used, it is necessary to satisfy the following
relationship:
External clock input period > 8/fsys
Therefore, when fsys = 54 MHz, the baud rate must be set to a rate lower than 54 / 8
= 6.75 (Mbps).
TMP19A61(rev 1.0)14-359
TMP19A61