tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 423

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tmp19a61f10xbg

Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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AN15(P87)
AN0 (P70)
16. Analog/Digital Converter
AN7(P77)
VREFH
VREFL
(Note)
1)
2)
Two 10-bit, sequential-conversion analog/digital converters (A/D converter) are built into the
TMP19A61. These A/D converters are equipped with 16 analog input channels. These units
operate independently and offer identical performance, so only unit A is described here.
Fig. 16.1 shows the block diagram of this A/D converter.
These 16 analog input channels (pins ANA0 through AN15) are also used as input ports.
Channel select
control circuit
ADAMOD1
If it is necessary to reduce a power current by operating the TMP19A61 in IDLE or
STOP mode and if either case shown below is applicable, you must first stop the
A/D converter and then execute the instruction to put the TMP19A61 into standby
mode:
The TMP19A61 must be put into IDLE mode when ADMOD1<I2AD> is "0."
The TMP19A61 must be put into STOP mode.
Internal data bus
VREF
ADSCN
Sample
conversion control
Fig. 16.1 A/D Converter Block Diagram
hold
ADAMOD0
end
ADS
Normal A/D
TMP19A61 (rev1.0)16-422
circuit
busy
Comparator
+
scan
repeat
Interval
interrupt
D/A converter
ADAMOD2
Internal data bus
Top-priority AD
conversion control
End
ADAREG08H~7FH
ADAREG08L~7FL
A / D conversion
AD conversion
Result register
ADAREGSP
Busy
result register
AD monitor
function control
ADAMOD3
start
Top-priority AD conversion
completion interrupt
HPADCE
Interrupt request INTADA
TMP19A61
AD start control
Internal data bus
AD monitor function
interrupt
ADAMOD4
TB0/CTRG
ADATRG(PN3)

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