tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 534

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Single
/single boot mode
Protecting bit
FLCS< BLPRO3:0>
23.3 Protect Configuration and Protect Statuses
19A61F
Chip
*1 : The data of address “0xBFC0_0000” or ”0xBFC0_0002” can be read.
*2 : Cannot write on (clear) the RSECON bit.
*3 : Cannot write on (clear) the DSUOFF bit.
*4 : Flash memory does not recognize commands.
*5 : Non-maskable interruption occurs.
*6 : Flash memory does not recognize commands.
*7 : Issued commands are converted to the command for erasing the whole flash memory area and
the command for erasing all protect bits.
*8 : Due to the protecting bit status, commands to the protected bit are rejeced.
*9 : Data is always read as 0x00000098.
FLASH protecting
ROM data protecting
DSU protecting
Read from internal ROM
Read from areas other than internal ROM
Internal ROM read by DSU-probe
RSECON rewrite (from internal ROM)
RSECON rewrite (from areas other than internal ROM)
DSUOFF rewrite (from internal ROM)
DSUOFF rewrite (from areas other than internal ROM)
Issuing of the command to erase protect bits
Issuing of commands other than the command to erase
protect bits
Writing of data to the DMAC setting register (from ROM)
Writing of data to the DMAC setting register (from areas other
than ROM)
If the bit is “1111”
FLASH protecting
Table 23-1 Protect Statuses in Each Mode
ROMSEC1<RSECON>
SEQMOD <DSUOFF>
Fig. 23.1 Various Protect Statuses
TMP19A61 (rev1.0) 23-533
ROM data protecting
DSU protecting
x *1
x *2
x *3
x *4
x *4
x *5
ON
○
○
○
○
x
ON
CS_DMA
OFF
x *1
x *2
x *3
x *4
x *4
x *5
○
○
○
○
○
ON
TMP19A61
x *6
ON
○*7
○
○
○
○
○
○
○
○
x
During a write of data
from areas other than
internal ROM to the
DMAC register
OFF
OFF
x *6
○*7
Bus error
exception occurs
NMI
○
○
○
○
○
○
○
○
○
OFF
OFF
OFF
∆ *8
○
○
○
○
○
○
○
○
○
○