tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 338

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

(0xFFFF_F704)
(0xFFFF_F703)
BR0ADD
BR0CR
(Note 1) In the UART mode, the division ratio "1" of the baud rate generator can be specified
(Note 2) To use the "N + (16 - K)/16" division function, be sure to set BR0CR <BR0ADDE> to
(Note 3) The "N + (16 - K)/16" division function can only be used in the UART mode. In the I/O
BR0ADD
<BR0K3:0>
bit Symbol
Read/Write
After reset
bit Symbol
Read/Write
After reset
Function
Function
only when the "N + (16 - K)/16" division function is not used. In the I/O interface mode,
the division ratio "1" of the baud rate generator can be specified only when double
buffering is used.
"1" after setting the K value (K = 1 to 15) to BR0ADD <BR0K3:0>. However, don't use
the "N + (16 - K)/16" division function when BR0CR <BR0S3:0> is set to either "0000"
or "0001" (N = 16 or 1).
interface mode, the "N + (16 - K)/16" division function must be disabled (prohibited) by
setting BR0CR <BR0ADDE> to "0."
1111(K = 15)
0001(K = 1)
Fig. 13.4.5 Baud Rate Generator Control (for SIO0, BR0CR, BR0ADD)
0000
<BR0S3:0>
Write "0."
Select input clock to the baud rate generator
BR0CR
7
0
7
0
0000(N = 16)
1: Enable
N+(16-K)/16
divider
function
0: Disable
BR0ADDE
0001(N = 1)
Disable
Disable
6
6
0
0
TMP19A61 (rev1.0)-13-337
BR0CR<BR0ADDE> = 1
R
Select input clock to the baud rate generator
00: φ T1
01: φ T4
10: φ T16
11: φ T64
00
01
10
11
BR0CK1
1111(N = 15)
5
5
0
0
N +
Internal clock φ T1
Internal clock φ T4
Internal clock φ T16
Internal clock φ T64
0010(N = 2)
(16 −
Disable
16
BR0CK0
K)
4
4
division
0
0
R/W
BR0S3
BR0K3
Specify K for the "N + (16 - K)/16" division
3
3
0
0
0001(N = 1) (ONLY UART)
BR0CR<BR0ADDE> = 0
BR0S2
BR0K2
1111 (N = 15)
0000 (N = 16)
Divide ratio "N"
Divide by N
2
2
0
0
R/W
TMP19A61
BR0S1
BR0K1
1
1
0
0
BR0S0
BR0K0
0
0
0
0