tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 399

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

SBI0DBR
(0xFFFF_F601)
SBI0I2CAR
(0xFFFF_F602)
SBI0BR0
(0xFFFF_F604)
(Note) Transmit data must be written to this register, with bit 7 being the most-significant bit
(MSB).
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
bit Symbol
Read/Write
After reset
Function
Set the slave address when the SBI acts as a slave device.
DB7
SA6
R
7
1
7
7
0
Serial bus interface baud rate register 0
Serial bus interface data buffer register
IDLE
0: Stop
1: Operate
Fig. 15.4.6 I
I2SBI
R/W
DB6
SA5
TMP19A61
6
6
6
0
0
I
2
C bus address register
DB5
SA4
2
5
5
5
1
0
C Bus Mode Register
(
rev1.0
R (Receive)/W (Transmit)
DB4
SA3
4
4
4
1
0
)
-15-398
R/W
0
DB3
SA2
3
R
3
3
1
0
Operation in the IDLE mode
Specify address recognition mode
0
1
0
1
Stop
Operate
DB2
SA1
Recognizes the slave address.
Does not recognize slave address.
2
1
2
2
0
TMP19A61
DB1
SA0
1
1
1
1
0
Be sure to
write “0”.
Specify
address
recognitio
n mode
R/W
DB0
ALS
0
0
0
0
0