tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 542
tmp19a61f10xbg
Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A61F10XBG.pdf
(575 pages)
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Part Number:
TMP19A61F10XBG
Manufacturer:
TOSHIBA/东芝
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ROMSEC1<RSECON> write
ROMSEC1<RSECON>
SEQMOD<DSUOFF> write
SEQMOD<DSUOFF>
23.5.5 ROM Protect Register: ROMSEC1<RSECON>
23.5.6 DSU Protect Mode Register: SEQMOD <DSUOFF>
The ROM protect register is equipped with a power-on reset circuit. Caution must be exercised
as data read from the ROMSEC1<RSECON> bit is different from the actually written data. How
data is processed is shown below. It is initialized by power-on reset.
The DSU protect mode register is equipped with a power-on reset circuit. Caution must be
exercised as data read from the SEQMOD <DSUOFF> bit is different from the actually written
data. How data is processed is shown below. It is initialized by power-on reset.
CLK
CLK
The access other than internal ROM is
disabled under ROM data protecting.
The access other than internal ROM is
disabled under ROM data protecting.
D
D
Reset
Reset
SD
SD
TMP19A61 (rev1.0) 23-541
ROMSEC2 = 0x0000 003D
DSUSEC2 = 0x0000_00C5
Q
Q
ROMSEC1<RSECON> read
SEQMOD<DSUOFF> Read
Power on reset
Power on reset
D
D
Flash read protect function
Flash read protect function
SD
SD
Q
Q
TMP19A61
ROM protecting
DSU protecting
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