tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 357

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

HSCLK0 output
(shared with
PL6)
HSCLK0 input
(shared with
PL6)
HRXD0
(shared with
PL5)
f
SYS
(N ote)
HSC0MOD0
<RXE>
FIFO control
RB8
I/O interface mode
Serial clock generation circuit
The baud rate generator cannot be set for "divide by 1".
RXDCLK
Receive buffer 1(shift register)
Receive counter
( ÷ 16 only with
Receive control
Internal data bus
Receive buffer 2(HSC0BUF)
<HBR0S5 :
UART)
HBR0CR
Baud rate
generator
0>
<BR0ADDE>
HBR0CR
Fig. 14-2 HSIO0 Block Diagram
HSC0MOD0
<WU>
<OERR><PERR><FERR>
TMP19A61(rev. 1.0) 14-356
<BR0K3 : 0>
HBR0ADD
<PE>
Parity control
HSC0CR
Error flag
÷ 2
HSC0CR
interrupt control
Serial channel
<EVEN>
(From TMRB8)
TB8OUT
HSC0MOD0
HSC0CR
<SC1, 0>
<IOC>
Internal data bus
I/O interface mode
UART
mode
HSC0MOD0
HTXDCLK
Transmit Buffer 1 (shift register)
<SM1, 0>
TB8
Transmit counter
(÷ 16 only with
Transmit control
Internal data bus
UART)
Transmit Buffer
HSIOCLK
FIFO control
HSC0MOD0
TMP19A61
<CTSE>
Interrupt request
HINTRX0
Interrupt request
HINTTX0
HCTS0
(shared with
PL6)
HTXD0
(shared with
PL6)