tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 335

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

(0xFFFF_F705)
SC0MOD1
＜ SINT2:0 ＞ : Specifies the interval time of continuous transmission when double buffering or FIFO is
enabled in the I/O interface mode. This parameter is invalid for the UART mode or when an external
clock is used.
＜ TXE ＞ : This bit enables transmission and is valid for all the transfer modes. If disabled while
transmission is in progress, transmission is inhibited only after the current frame of data is completed
for transmission.
enabled. In the UART mode, it is used only to specify the FIFO configuration.
＜ FDPX1:0>: Configures the transfer mode in the I/O interface mode. Also configures the FIFO if it is
＜ I2S0 ＞ : Specifies the Idle mode operation.
bit Symbol
Read/Write
After reset
Function
Fig. 13.4.2 Serial Mode Control Register 1 (for SIO0, SC0MOD1)
IDLE
0: Stop
1:
Operation
I2S0
7
0
Transfer mode setting
00: Transfer prohibited
01: Half duplex (RX)
10: Half duplex (TX)
11: Full duplex
TMP19A61 (rev1.0)-13-334
FDPX1
6
0
FDPX0
5
0
Transmit
control
0: Disable
1: Enable
TXE
4
0
R/W
Interval time of continuous
transmission
000: None 100: 8SCLK
001: 1SCLK
010: 2SCLK
011: 4SCLK
SINT2
3
0
SINT1
101:16SCLK
110: 32SCLK
111: 64SCLK
2
0
TMP19A61
SINT0
1
0
Write "0."
0
0