MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 29

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MMC2107CFCPV33

Manufacturer Part Number
MMC2107CFCPV33
Description
IC MCU 33MHZ 128K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheet

Specifications of MMC2107CFCPV33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
0 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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MMC2107 – Rev. 2.0
MOTOROLA
Technical Data — MMC2107
Figure
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Freescale Semiconductor, Inc.
For More Information On This Product,
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Register Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Chip Configuration Module Block Diagram . . . . . . . . . . . . . 92
Chip Configuration Register (CCR) . . . . . . . . . . . . . . . . . . .94
Reset Configuration Register (RCON) . . . . . . . . . . . . . . . . . 97
Chip Identification Register (CIR). . . . . . . . . . . . . . . . . . . . . 99
Chip Test Register (CTR). . . . . . . . . . . . . . . . . . . . . . . . . . 100
144-Pin LQFP Assignments . . . . . . . . . . . . . . . . . . . . . . . . 115
100-Pin LQFP Assignments . . . . . . . . . . . . . . . . . . . . . . . . 116
Reset Controller Block Diagram . . . . . . . . . . . . . . . . . . . . . 131
Reset Control Register (RCR) . . . . . . . . . . . . . . . . . . . . . . 133
Reset Status Register (RSR) . . . . . . . . . . . . . . . . . . . . . . .134
Reset Test Register (RTR). . . . . . . . . . . . . . . . . . . . . . . . . 135
Reset Control Flow. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
M•CORE Processor Block Diagram . . . . . . . . . . . . . . . . . . 145
Programming Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
Data Organization in Memory. . . . . . . . . . . . . . . . . . . . . . .149
Data Organization in Registers . . . . . . . . . . . . . . . . . . . . . 149
Interrupt Controller Block Diagram . . . . . . . . . . . . . . . . . . .155
Interrupt Control Register (ICR) . . . . . . . . . . . . . . . . . . . . . 157
Interrupt Status Register (ISR) . . . . . . . . . . . . . . . . . . . . . . 159
Interrupt Force Register High (IFRH) . . . . . . . . . . . . . . . . . 160
Interrupt Force Register Low (IFRL). . . . . . . . . . . . . . . . . . 161
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List of Figures
Title
List of Figures
Technical Data
Page
29

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