MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 391

• Manufacturer Part Number: MMC2107CFCPV33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCPV33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

MMC2107 – Rev. 2.0
MOTOROLA
Legend:
BEGIN TRANSMISSION
CHANGE OUTPUT
CHANGE OUTPUT
t
t
t
t
SS PIN OUTPUT
MSB FIRST (LSBFE = 0):
LSB FIRST (LSBFE = 1):
SCK (CPOL = 0)
SCK (CPOL = 1)
L
T
I
L
SAMPLE INPUT
MASTER ONLY
, t
SLAVE SS PIN
= Minimum idling time between transmissions (minimum SS high time)
= Minimum leading time before the first SCK edge
= Minimum trailing time after the last SCK edge
T
MOSI/MISO
, and t
MOSI PIN
MISO PIN
NOTE:
I
are guaranteed for master mode and required for slave mode.
t
Figure 17-12. SPI Clock Format 0 (CPHA = 0)
When CPHA = 0, the slave SS pin must be negated and reasserted
between bytes.
Clock skew between the master and slave can cause data to be lost
when:
L
MSB
LSB
•
•
•
•
Freescale Semiconductor, Inc.
For More Information On This Product,
CPHA = 0, and,
The baud rate is the SPI clock divided by two, and
The master SCK frequency is half the slave SPI clock frequency,
and
Software writes to the slave SPIDR just before the synchronized
SS signal goes low.
Serial Peripheral Interface Module (SPI)
Bit 6
Bit 1
Go to: www.freescale.com
Bit 5
Bit 2
Bit 4
Bit 3
Bit 3
Bit 4
Bit 2
Bit 5
END TRANSMISSION
Serial Peripheral Interface Module (SPI)
Bit 1
Bit 6
MSB
LSB
Functional Description
MINIMUM 1/2 SCK
t
T
FOR t
t
I
Technical Data
T
, t
L
t
, t
L
l
391