MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 305

• Manufacturer Part Number: MMC2107CFCPV33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCPV33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

15.7.6 Timer System Control Register 1
MMC2107 – Rev. 2.0
MOTOROLA
Address: TIM1 — 0x00ce_0006
Reset:
Read: Anytime
Write: Anytime
TIMEN — Timer Enable Bit
TFFCA — Timer Fast Flag Clear All Bit
Read:
Write:
TIMEN enables the timer. When the timer is disabled, only the
registers are accessible. Clearing TIMEN reduces power
consumption.
TFFCA enables fast clearing of the main timer interrupt flag registers
(TIMFLG1 and TIMFLG2) and the PA flag register (TIMPAFLG).
TFFCA eliminates the software overhead of a separate clear
sequence.
When TFFCA is set:
Writing logic 1s to the flags clears them only when TFFCA is clear.
Freescale Semiconductor, Inc.
Figure 15-8. Timer System Control Register (TIMSCR1)
For More Information On This Product,
1 = Timer enabled
0 = Timer and timer counter disabled
1 = Fast flag clearing
0 = Normal flag clearing
TIM2 — 0x00cf_0006
–
– Any access of the timer count registers (TIMCNTH/L) clears
– Any access of the PA counter registers (TIMPACNT) clears
TIMEN
Bit 7
0
clears the corresponding channel flag, CxF.
the TOF flag.
both the PAOVF and PAIF flags in TIMPAFLG.
An input capture read or a write to an output compare channel
Timer Modules (TIM1 and TIM2)
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= Writes have no effect and the access terminates without a transfer error exception.
6
0
0
5
0
0
TFFCA
4
0
3
0
0
Timer Modules (TIM1 and TIM2)
Memory Map and Registers
2
0
0
1
0
0
Technical Data
Bit 0
0
0
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