DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 156

• Manufacturer Part Number: DF2110BVTE10
• Description: MCU 3V 64K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2110BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2110BVTE10; HD64F2110BVTE10

Section 7 I/O Ports
7.9.2
P8DR stores output data for the port 8 pins (P86 to P80).
Bit
7
6
5
4
3
2
1
0
7.9.3
SPS1 *
ICE
CKE1
C/A
CKE0
P86DDR
Pin Function
Notes: 1. When the IRQ5E bit in IER is set to 1, this pin is used as the IRQ5 input pin. When this
Rev. 2.00 Mar 21, 2006 page 116 of 518
REJ09B0299-0200
P86/IRQ5/ SCK1/SCL1
The pin function is switched as shown below according to the combination of the CKE1 and
CKE0 bits in SCR of SCI_1, the C/A bit in SMR of SCI_1, the SPS1 bit*
bit in ICCR of IIC_1, and the P86DDR bit.
2
2. The program development tool (emulator) does not support this function.
Bit Name
P86DR
P85DR
P84DR
P83DR
P82DR
P81DR
P80DR
Port 8 Data Register (P8DR)
Pin Functions
pin is used as the SCL1 I/O pin, bits CKE1 and CKE0 in SCR of SCI_1 and bit C/A in
SMR of SCI_1 must all be cleared to 0. When the P86 output pin and SCK1 output pin
are set, the output type is NMOS push-pull output. SCL1 is an NMOS-only output, and
has direct bus drive capability.
input pin
P86
0
Initial Value
1
0
0
0
0
0
0
0
0
output
P86
pin
0
1
0
output
SCK1
pin
0
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
output
SCK1
pin
1
Description
Reserved
The initial value should not be changed.
If a port 8 read is performed while P8DDR bits are
set to 1, the P8DR values are read directly,
regardless of the actual pin states. If a port 8 read
is performed while P8DDR bits are cleared to 0,
the pin states are read.
IRQ5 input pin *
input pin
SCK1
1
I/O pin
SCL1
1
1
0
0
0
input pin
P86
0
2
in SPSR, the ICE
0
output
P86
pin
1
1
I/O pin
SCL1
1