DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 51

MCU 3V 64K 100-TQFP

DF2110BVTE10

Manufacturer Part Number
DF2110BVTE10
Description
MCU 3V 64K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2110BVTE10

Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
82
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
HD64F2110BVTE10
HD64F2110BVTE10

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2110BVTE10V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Type
Host
interface
(LPC)
Keyboard
buffer
controller
I
interface
(IIC)
2
C bus
Symbol
LAD3 to
LAD0
LFRAME
LRESET
LCLK
SERIRQ
LSCI,
LSMI, PME
GA20
CLKRUN
LPCPD
KIN0 to
KIN15
WUE0 to
WUE7
SCL0
SCL1
SDA0
SDA1
FP-100B,
TFP-100B I/O
85 to 82
86
87
88
89
90, 91, 93
94
95
96
26 to 29,
32 to 35,
48, 47, 31,
30, 21, 20,
11, 10
91, 90, 81,
80, 69, 68,
58, 57
12
99
16
51
Pin No.
Input/
Output
Input
Input
Input
Input/
Output
Input/
Output
Input/
Output
Input/
Output
Input
Input
Input
Input/
Output
Input/
Output
Name and Function
LPC command, address, and data input/output pins.
Input pin that indicates the start of an LPC cycle or
forced termination of an abnormal LPC cycle.
Input pin that indicates an LPC reset.
The LPC clock input pin.
Input/output pin for LPC serialized host interrupts
(HIRQ1, SMI, HIRQ6, HIRQ9 to HIRQ12).
LPC auxiliary output pins. Functionally, they are general
I/O ports.
A20 gate control signal output pin. Output state
monitoring input is possible.
Input/output pin that requests the start of LCLK
operation when LCLK is stopped.
Input pin that controls LPC module shutdown.
Matrix keyboard input pins. KIN0 to KIN15 are used as
key-scan inputs, and P10 to P17 and P20 to P27 are
used as key-scan outputs. This allows a maximum 16-
output
Wakeup event input pins. These pins allow the same
kind of wakeup as key-wakeup from various sources.
I
output.
I
output.
2
2
C clock I/O pins. The output type is NMOS open-drain
C data I/O pins. The output type is NMOS open-drain
16-input, 256-key matrix to be configured.
Rev. 2.00 Mar 21, 2006 page 11 of 518
Section 1 Overview
REJ09B0299-0200

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