DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 441

MCU 3V 64K 100-TQFP

DF2110BVTE10

Manufacturer Part Number
DF2110BVTE10
Description
MCU 3V 64K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2110BVTE10

Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
82
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
HD64F2110BVTE10
HD64F2110BVTE10

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2110BVTE10V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Table 15.7 Frame Configuration of Serial Interrupt Transfer Cycle
Frame
Count
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
There are two modes—continuous mode and quiet mode—for serialized interrupts. The mode
initiated in the next transfer cycle is selected by the stop frame of the serialized interrupt transfer
cycle that ended before that cycle.
In continuous mode, the host initiates host interrupt transfer cycles at regular intervals. In quiet
mode, the slave processor with interrupt sources requiring a request can also initiate an interrupt
transfer cycle, in addition to the host. In quiet mode, since the host does not necessarily initiate
interrupt transfer cycles, it is possible to suspend the clock (LCLK) supply and enter the power-
Contents
Start
IRQ0
IRQ1
SMI
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8
IRQ9
IRQ10
IRQ11
IRQ12
IRQ13
IRQ14
IRQ15
IOCHCK
Stop
Serial Interrupt Transfer Cycle
Drive
Source
Slave
Host
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Host
Number
of States
6
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
Undefined
Section 15 Host Interface LPC Interface (LPC)
Notes
In quiet mode only, slave drive possible in first
state, then next 3 states 0-driven by host
Drive possible in LPC channel 1
Drive possible in LPC channels 2 and 3
Drive possible in LPC channels 2 and 3
Drive possible in LPC channels 2 and 3
Drive possible in LPC channels 2 and 3
Drive possible in LPC channels 2 and 3
Drive possible in LPC channel 1
First, 1 or more idle states, then 2 or 3 states
0-driven by host
2 states: Quiet mode next
3 states: Continuous mode next
Rev. 2.00 Mar 21, 2006 page 401 of 518
REJ09B0299-0200

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