DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 423

• Manufacturer Part Number: DF2110BVTE10
• Description: MCU 3V 64K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2110BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2110BVTE10; HD64F2110BVTE10

Bit
2
1
Bit Name Initial Value Slave Host Description
SMIE2
IRQ12E1 0
0
R/W
R/W
R/W
—
—
Host SMI Interrupt Enable 2
Enables or disables a host SMI interrupt request
when OBF2 is set by an ODR2 write.
0: Host SMI interrupt request by OBF2 and SMIE2 is
disabled
[Clearing conditions]
1: [When IEDIR = 0]
[Setting condition]
Writing 1 after reading SMIE2 = 0
Host IRQ12 Interrupt Enable 1
Enables or disables a host IRQ12 interrupt request
when OBF1 is set by an ODR1 write.
0: Host IRQ12 interrupt request by OBF1 and
IRQ12E1 is disabled
[Clearing conditions]
1: Host IRQ12 interrupt request by setting OBF1 to 1
is enabled
[Setting condition]
Writing 1 after reading IRQ12E1 = 0
Writing 0 to SMIE2
LPC hardware reset, LPC software reset
Clearing OBF2 to 0 (when IEDIR = 0)
Host SMI interrupt request by setting OBF2 to 1
is enabled
[When IEDIR = 1]
Host SMI interrupt is requested
Writing 0 to IRQ12E1
LPC hardware reset, LPC software reset
Clearing OBF1 to 0
Section 15 Host Interface LPC Interface (LPC)
Rev. 2.00 Mar 21, 2006 page 383 of 518
REJ09B0299-0200