DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 27

• Manufacturer Part Number: DF2110BVTE10
• Description: MCU 3V 64K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2110BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2110BVTE10; HD64F2110BVTE10

17.4 Input/Output Pins .............................................................................................................. 415
17.5 Register Descriptions ........................................................................................................ 415
17.6 Operating Modes............................................................................................................... 419
17.7 On-Board Programming Modes........................................................................................ 419
17.8 Flash Memory Programming/Erasing ............................................................................... 425
17.9 Program/Erase Protection ................................................................................................. 429
17.10 Interrupts during Flash Memory Programming/Erasing ................................................... 430
17.11 Programmer Mode ............................................................................................................ 431
17.12 Usage Notes ...................................................................................................................... 431
Section 18 Clock Pulse Generator
18.1 Oscillator........................................................................................................................... 434
18.2 Duty Correction Circuit .................................................................................................... 437
18.3 Medium-Speed Clock Divider .......................................................................................... 437
18.4 Bus Master Clock Select Circuit ....................................................................................... 438
18.5 Subclock Input Circuit ...................................................................................................... 438
18.6 Waveform Forming Circuit............................................................................................... 439
18.7 Clock Select Circuit .......................................................................................................... 439
18.8 Usage Notes ...................................................................................................................... 439
Section 19 Power-Down Modes
19.1 Register Descriptions ........................................................................................................ 441
19.2 Mode Transitions and LSI States ...................................................................................... 446
17.5.1 Flash Memory Control Register 1 (FLMCR1)..................................................... 416
17.5.2 Flash Memory Control Register 2 (FLMCR2)..................................................... 417
17.5.3 Erase Block Registers 1 and 2 (EBR1, EBR2)..................................................... 418
17.7.1 Boot Mode ........................................................................................................... 420
17.7.2 User Program Mode............................................................................................. 424
17.8.1 Program/Program-Verify ..................................................................................... 425
17.8.2 Erase/Erase-Verify............................................................................................... 427
17.9.1 Hardware Protection ............................................................................................ 429
17.9.2 Software Protection.............................................................................................. 429
17.9.3 Error Protection.................................................................................................... 429
18.1.1 Connecting Crystal Resonator ............................................................................. 434
18.1.2 External Clock Input Method............................................................................... 435
18.8.1 Note on Resonator ............................................................................................... 439
18.8.2 Notes on Board Design ........................................................................................ 440
19.1.1 Standby Control Register (SBYCR) .................................................................... 442
19.1.2 Low-Power Control Register (LPWRCR) ........................................................... 444
19.1.3 Module Stop Control Registers H and L (MSTPCRH, MSTPCRL).................... 445
...................................................................................... 441
.................................................................................. 433
Rev. 2.00 Mar 21, 2006 page xxv of xxxviii