DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 540

• Manufacturer Part Number: DF2110BVTE10
• Description: MCU 3V 64K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2110BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2110BVTE10; HD64F2110BVTE10

Section 21 Electrical Characteristics
Erase
Notes: 1. Set the times according to the program/erase algorithms.
Rev. 2.00 Mar 21, 2006 page 500 of 518
REJ09B0299-0200
2. Programming time per 128 bytes (Shows the total period for which the P-bit in FLMCR1
3. Block erase time (Shows the total period for which the E-bit in FLMCR1 is set. It does
4. Maximum programming time (t
5. The maximum number of writes (N) should be set according to the actual set value of
6. Maximum erase time (t
7. The maximum number of erases (N) should be set according to the actual set value of z
t
The wait time after P-bit setting (z1, z2, and z3) should be alternated according to the
1
t
is set. It does not include the programming verification time.)
not include the erase verification time.)
+ wait time after P-bit setting (z2)
z1, z2 and z3 to allow programming within the maximum programming time (t
number of writes (n) as follows:
7
to allow erasing within the maximum erase time (t
P
E
(max)
(max) = Wait time after E-bit setting (z)
n
Wait time after
SWE-bit setting *
Wait time after
ESU-bit setting *
Wait time after
E-bit setting *
Wait time after
E-bit clear *
Wait time after
ESU-bit clear *
Wait time after
EV-bit setting *
Wait time after
dummy write *
Wait time after
EV-bit clear *
Wait time after
SWE-bit clear *
Maximum erase
count *
Item
n
6
1000
1
*
6
*
7
1
= (wait time after P-bit setting (z1) + (z3))
z1 = 30µs, z3 = 10µs
z2 = 200µs
1
1
*
1
1
1
6
1
1
1
E
Symbol Min
x
y
z
N
(max))
P
(max))
1
100
10
10
10
20
2
4
100
—
((N) – 6)
maximum erase count (N)
—
—
—
—
—
—
—
—
—
—
Typ
E
(max)).
Max
—
—
100
—
—
—
—
—
—
120
6
Unit
µs
µs
ms
µs
µs
µs
µs
µs
µs
times
Test
Conditions
P
(max)).