DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 270

• Manufacturer Part Number: DF2110BVTE10
• Description: MCU 3V 64K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2110BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2110BVTE10; HD64F2110BVTE10

Section 12 Serial Communication Interface (SCI)
Bit
4
3
2
1
0
Note: * Only 0 can be written, to clear the flag.
Rev. 2.00 Mar 21, 2006 page 230 of 518
REJ09B0299-0200
Bit Name
FER
PER
TEND
MPB
MPBT
Initial Value
0
0
1
0
0
R/W
R/(W) * Framing Error
R/(W) * Parity Error
R
R
R/W
Description
[Setting condition]
When the stop bit is 0
[Clearing condition]
When 0 is written to FER after reading FER = 1
In 2-stop-bit mode, only the first stop bit is checked.
[Setting condition]
When a parity error is detected during reception
[Clearing condition]
When 0 is written to PER after reading PER = 1
Transmit End
[Setting conditions]
[Clearing condition]
When 0 is written to TDRE after reading TDRE = 1
Multiprocessor Bit
MPB stores the multiprocessor bit in the receive
frame. When the RE bit in SCR is cleared to 0 its
previous state is retained.
MPBT stores the multiprocessor bit to be added to
the transmit frame.
Multiprocessor Bit Transfer
When the TE bit in SCR is 0
When TDRE = 1 at transmission of the last bit
of a 1-byte serial transmit character