DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 478

• Manufacturer Part Number: DF2110BVTE10
• Description: MCU 3V 64K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2110BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2110BVTE10; HD64F2110BVTE10

Section 18 Clock Pulse Generator
18.4
The bus master clock select circuit selects a clock to supply the bus master with either the system
clock ( ) or medium-speed clock ( /2, /4, /8, /16, or /32) by the SCK2 to SCK0 bits in
SBYCR.
18.5
The subclock input circuit controls subclock input from the EXCL pin. To use the subclock, a
32.768-kHz external clock should be input from the EXCL pin. At this time, the P96DDR bit in
P9DDR should be cleared to 0, and the EXCLE bit in LPWRCR should be set to 1.
Subclock input conditions are shown in table 18.5. When the subclock is not used, subclock input
should not be enabled.
Table 18.5 Subclock Input Conditions
Item
Subclock input pulse width
low level
Subclock input pulse width
high level
Subclock input rising time
Subclock input falling time
When Subclock Is Not Needed: Do not enable subclock input when the subclock is not needed.
Note on Subclock Usage:
32-kHz clock are not input after the 32-kHz clock input is enabled (EXCLE = 1) until the
Rev. 2.00 Mar 21, 2006 page 438 of 518
REJ09B0299-0200
Bus Master Clock Select Circuit
Subclock Input Circuit
EXCL
t
EXCLr
In transiting to power-down mode, if at least two cycles of the
Symbol
t
t
t
t
EXCLL
EXCLH
EXCLr
EXCLf
Figure 18.7 Subclock Input Timing
t
EXCLH
Vcc = 2.7 to 3.6 V
Min
—
—
—
—
Typ
15.26
15.26
—
—
t
EXCLf
t
EXCLL
Max
—
—
10
10
Unit
ns
ns
V
s
s
CC
× 0.5
Measurement
Condition
Figure 18.7