DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 204

MCU 3V 64K 100-TQFP

DF2110BVTE10

Manufacturer Part Number
DF2110BVTE10
Description
MCU 3V 64K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2110BVTE10

Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
82
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
HD64F2110BVTE10
HD64F2110BVTE10

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2110BVTE10V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 9 16-Bit Free-Running Timer (FRT)
9.5.7
The output compare flag, OCFA or OCFB, is set to 1 by a compare-match signal generated when
the FRC value matches the OCRA or OCRB value. This compare-match signal is generated at the
last state in which the two values match, just before FRC increments to a new value. When the
FRC and OCRA or OCRB value match, the compare-match signal is not generated until the next
cycle of the clock source. Figure 9.12 shows the timing of setting the OCFA or OCFB flag.
9.5.8
The FRC overflow flag (OVF) is set to 1 when FRC overflows (changes from H'FFFF to H'0000).
Figure 9.13 shows the timing of setting the OVF flag.
Rev. 2.00 Mar 21, 2006 page 164 of 518
REJ09B0299-0200
φ
FRC
OCRA, OCRB
Compare-match
signal
OCFA, OCFB
Timing of Output Compare Flag (OCF) setting
Timing of FRC Overflow Flag Setting
Figure 9.12 Timing of Output Compare Flag (OCFA or OCFB) Setting
φ
FRC
Overflow signal
OVF
Figure 9.13 Timing of Overflow Flag (OVF) Setting
N
H'FFFF
N
H'0000
N + 1

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