DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 202

• Manufacturer Part Number: DF2110BVTE10
• Description: MCU 3V 64K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2110BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2110BVTE10; HD64F2110BVTE10

Section 9 16-Bit Free-Running Timer (FRT)
If ICRA to ICRAD are read when the corresponding input capture signal arrives, the internal input
capture signal is delayed by one system clock ( ). Figure 9.8 shows the timing for this case.
9.5.5
ICRC and ICRD can operate as buffers for ICRA and ICRB, respectively. Figure 9.9 shows how
input capture operates when ICRC is used as ICRA's buffer register (BUFEA = 1) and IEDGA and
IEDGC are set to different values (IEDGA = 0 and IEDGC = 1, or IEDGA = 1 and IEDGC = 0),
so that input capture is performed on both the rising and falling edges of FTIA.
Rev. 2.00 Mar 21, 2006 page 162 of 518
REJ09B0299-0200
Figure 9.8 Input Capture Input Signal Timing (When ICRA to ICRD Are Read)
φ
FTIA
Input capture
signal
FRC
ICRA
ICRC
φ
Input capture
input pin
Input capture signal
Buffered Input Capture Input Timing
M
m
Figure 9.9 Buffered Input Capture Timing
n
M
n
n + 1
Read cycle of ICRA to ICRD
T 1
N
M
n
T 2
N
n
N + 1