DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 55

MCU 3V 64K 100-TQFP

DF2110BVTE10

Manufacturer Part Number
DF2110BVTE10
Description
MCU 3V 64K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2110BVTE10

Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
82
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
HD64F2110BVTE10
HD64F2110BVTE10

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2110BVTE10V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
2.1.2
In comparison to the H8/300 CPU, the H8S/2000 CPU has the following enhancements.
2.1.3
In comparison to the H8/300H CPU, the H8S/2000 CPU has the following enhancements.
More general registers and control registers
Eight 16-bit extended registers and one 8-bit control register have been added.
Expanded address space
Normal mode supports the same 64-kbyte address space as the H8/300 CPU.
Advanced mode supports a maximum 16-Mbyte address space.
Enhanced addressing
The addressing modes have been enhanced to make effective use of the 16-Mbyte address
space.
Enhanced instructions
Addressing modes of bit-manipulation instructions have been enhanced.
Signed multiply and divide instructions have been added.
Two-bit shift and two-bit rotate instructions have been added.
Instructions for saving and restoring multiple registers have been added.
A test and set instruction has been added.
Higher speed
Basic instructions are executed twice as fast.
Additional control register
One 8-bit control register has been added.
Enhanced instructions
Addressing modes of bit-manipulation instructions have been enhanced.
Two-bit shift and two-bit rotate instructions have been added.
Instructions for saving and restoring multiple registers have been added.
A test and set instruction has been added.
Higher speed
Basic instructions are executed twice as fast.
Differences from H8/300 CPU
Differences from H8/300H CPU
Rev. 2.00 Mar 21, 2006 page 15 of 518
REJ09B0299-0200
Section 2 CPU

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