DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 35

• Manufacturer Part Number: DF2110BVTE10
• Description: MCU 3V 64K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2110BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: HD64F2110BVTE10; HD64F2110BVTE10

Figure 18.4
Figure 18.5
Figure 18.6
Figure 18.7
Figure 18.8
Section 19 Power-Down Modes
Figure 19.1
Figure 19.2
Figure 19.3
Figure 19.4
Section 21 Electrical Characteristics
Figure 21.1
Figure 21.2
Figure 21.3
Figure 21.4
Figure 21.5
Figure 21.6
Figure 21.7
Figure 21.8
Figure 21.9
Figure 21.10 I/O Port Input/Output Timing .............................................................................. 504
Figure 21.11 FRT Input/Output Timing.................................................................................... 504
Figure 21.12 FRT Clock Input Timing ..................................................................................... 505
Figure 21.13 8-Bit Timer Output Timing.................................................................................. 505
Figure 21.14 8-Bit Timer Clock Input Timing.......................................................................... 505
Figure 21.15 8-Bit Timer Reset Input Timing........................................................................... 505
Figure 21.16 PWMX Output Timing ........................................................................................ 506
Figure 21.17 SCK Clock Input Timing ..................................................................................... 506
Figure 21.18 SCI Input/Output Timing (Synchronous Mode) .................................................. 506
Figure 21.19 A/D Converter External Trigger Input Timing .................................................... 506
Figure 21.20 Keyboard Buffer Controller Timing .................................................................... 507
Figure 21.21 I
Figure 21.22 Host Interface (LPC) Timing ............................................................................... 508
Figure 21.23 Tester Measurement Condition............................................................................ 509
Appendix C Package Dimensions
Figure C.1
Figure C.2
Example of External Clock Input......................................................................... 435
External Clock Input Timing ............................................................................... 436
Timing of External Clock Output Stabilization Delay Time ............................... 437
Subclock Input Timing ........................................................................................ 438
Note on Board Design of Oscillator Circuit Section............................................ 440
Mode Transition Diagram.................................................................................... 447
Medium-Speed Mode Timing.............................................................................. 450
Application Example in Software Standby Mode................................................ 452
Hardware Standby Mode Timing......................................................................... 453
Darlington Pair Drive Circuit (Example)............................................................. 492
LED Drive Circuit (Example).............................................................................. 492
Output Load Circuit ............................................................................................. 494
Connection of VCL Capacitor ............................................................................. 501
System Clock Timing .......................................................................................... 501
Oscillation Settling Timing.................................................................................. 502
Oscillation Setting Timing (Exiting Software Standby Mode) ............................ 502
Reset Input Timing .............................................................................................. 503
Interrupt Input Timing ......................................................................................... 503
Package Dimensions (FP-100B) .......................................................................... 513
Package Dimensions (TFP-100B)........................................................................ 514
2
C Bus Interface Input/Output Timing................................................................ 508
Rev. 2.00 Mar 21, 2006 page xxxiii of xxxviii