UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 1118

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
(8) Communication at different potential (2.5 V, 3 V) (simplified I
Note
Caution Select the TTL input buffer and the N-ch open drain output (V
Remarks 1.
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
SCLr clock frequency
Hold time when SCLr = “L”
Hold time when SCLr = “H”
Data setup time (reception)
Data hold time (transmission)
Caution The pins mounted depend on the product. Refer to Caution 2 at the beginning of this chapter.
(T
A
The value must also be f
= −40 to +85°C, 2.7 V ≤ V
the N-ch open drain output (V
(PIMg) and port output mode register g (POMg).
2.
3.
4.
(Operation clock to be set by the CKSmn bit of serial mode register mn (SMRmn). m: Unit number (m = 0,
1), n: Channel number (n = 0, 2), mn = 02, 10)
R
r: IIC number (r = 10, 20), g: PIM, POM number (g = 0, 14)
f
V
communicating at different potentials in simplified I
C
MCK
IH
b
b
[Ω]:Communication line (SDAr, SCLr) pull-up resistance,
[F]: Communication line (SDAr, SCLr) load capacitance, V
4.0 V ≤ V
2.7 V ≤ V
and V
: Serial array unit operation clock frequency
Parameter
IL
below are observation points for the AC characteristics of the serial array unit when
DD
DD
≤ 5.5 V, 2.7 V ≤ V
< 4.0 V, 2.3 V ≤ V
CHAPTER 31 ELECTRICAL SPECIFICATIONS (78K0R/KF3-L, 78K0R/KG3-L)
MCK
DD
/4 or more.
= EV
DD0
DD
= EV
tolerance) mode for the SCLr pin by using port input mode register g
b
b
≤ 4.0 V: V
≤ 2.7 V: V
f
t
t
t
t
SCL
LOW
HIGH
SU:DAT
HD:DAT
Symbol
DD1
≤ 5.5 V, V
IH
IH
4.0 V ≤ V
2.7 V ≤ V
C
2.7 V ≤ V
2.3 V ≤ V
C
4.0 V ≤ V
2.7 V ≤ V
C
2.7 V ≤ V
2.3 V ≤ V
C
4.0 V ≤ V
2.7 V ≤ V
C
2.7 V ≤ V
2.3 V ≤ V
C
4.0 V ≤ V
2.7 V ≤ V
C
2.7 V ≤ V
2.3 V ≤ V
C
4.0 V ≤ V
2.7 V ≤ V
C
2.7 V ≤ V
2.3 V ≤ V
C
= 2.2 V, V
= 2.0 V, V
b
b
b
b
b
b
b
b
b
b
= 100 pF, R
= 100 pF, R
= 100 pF, R
= 100 pF, R
= 100 pF, R
= 100 pF, R
= 100 pF, R
= 100 pF, R
= 100 pF, R
= 100 pF, R
SS
2
Conditions
C mode mode.
= EV
2
DD
b
DD
b
DD
b
DD
b
DD
b
DD
b
DD
b
DD
b
DD
b
DD
b
C mode)
≤ 4.0 V,
≤ 2.7 V,
≤ 4.0 V,
≤ 2.7 V,
≤ 4.0 V,
≤ 2.7 V,
≤ 4.0 V,
≤ 2.7 V,
≤ 4.0 V,
≤ 2.7 V,
≤ 5.5 V,
< 4.0 V,
≤ 5.5 V,
< 4.0 V,
≤ 5.5 V,
< 4.0 V,
≤ 5.5 V,
< 4.0 V,
≤ 5.5 V,
< 4.0 V,
IL
IL
SS0
= 0.8 V
= 0.5 V
b
b
b
b
b
b
b
b
b
b
= 1.4 kΩ
= 2.7 kΩ
= 1.4 kΩ
= 2.7 kΩ
= 1.4 kΩ
= 2.7 kΩ
= 1.4 kΩ
= 2.7 kΩ
= 1.4 kΩ
= 2.7 kΩ
= EV
b
[V]: Communication line voltage
DD
SS1
tolerance) mode for the SDAr pin and
1/f
1/f
= AV
MCK
MCK
1275
1275
MIN.
655
655
0
0
SS
+ 190
+ 190
= 0 V)
400
400
MAX.
640
660
Note
Note
Unit
kHz
kHz
ns
ns
ns
ns
ns
ns
ns
ns
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