UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 754

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
Notes 1. Serial channel enable register 2 (SE2) is a read-only status register which is set using serial channel start
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Note 1
Remark X: Don’t care
SE
20
0
1
Table 14-17. Relationship between register settings and pins (Channel 0 of unit 2: CSI40, UART4 transmission)
MD
202
0
0
0
0
2. When channel 1 of unit 2 is set to UART4 reception, this pin becomes an RxD4 function pin (refer to Table 14-
3. This pin can be set as a port function pin.
4. This is 0 or 1, depending on the communication operation. For details, refer to 14.3 (12) Serial output register
5. When using UART4 transmission and reception in a pair, set channel 1 of unit 2 to UART4 reception (refer to
201
MD
18). In this case, operation stop mode or UART4 transmission must be selected for channel 0 of unit 2.
m (SOm).
Table 14-18).
0
1
0
1
register 2 (SS2) and serial channel stop register 2 (ST2).
SOE
20
0
0
1
1
0
1
1
1
Note 4
Note 4
Note 4
Note 4
Note 4
0/1
0/1
SO
0/1
0/1
0/1
20
1
1
1
CKO
Note 4
Note 4
Note 4
0/1
0/1
0/1
20
1
1
1
1
1
TXE
20
0
0
1
1
0
1
1
1
(
RXE
μ
20
0
1
0
1
1
0
1
0
PD78F1027, 78F1028, 78F1029, 78F1030 only)
Note 3
Note 3
PM
50
×
1
1
1
0
0
0
×
Note 3
Note 3
P50 PM
×
×
×
×
1
1
1
×
Note 3
Note 3
Note 2
Note 3
Note 3
51
×
1
×
1
1
×
1
×
Note 3
Note 3
Note 2
Note 3
Note 3
P51
×
×
×
×
×
×
×
×
Note 3
Note 3
Note 3
PM
52
×
0
0
×
0
0
0
×
Note 3
Note 3
P52
Note 3
×
×
×
1
1
1
1
1
transmission
Operation mode
Operation stop
Master CSI40
Master CSI40
Master CSI40
transmission/
transmission/
transmission
transmission
Slave CSI40
Slave CSI40
Slave CSI40
reception
reception
reception
reception
UART4
mode
CHAPTER 14 SERIAL ARRAY UNIT
Note 5
(output)
(output)
(output)
SCK40/
SCK40
SCK40
SCK40
SCK40
SCK40
SCK40
INTP1/
INTP1/
INTP1/
(input)
(input)
(input)
P50
P50
P50
INTP2/P51
INTP2/P51
P51/RxD4
P51/RxD4
Pin Function
P51
INTP2/
INTP2/
INTP2/
INTP2/
RxD4/
SI40/
SI40
SI40
SI40
SI40
P51
Note 2
TO00/P52
TO00/P52
TO00/P52
TO00/P52
SO40/
TxD4/
SO40
SO40
SO40
SO40
TxD4
754