UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 553

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
(6) Successive approximation register (SAR)
(7) 10-bit A/D conversion result register (ADCR)
(8) 8-bit A/D conversion result register (ADCRH)
(9) Controller
(10) AV
(11) AV
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
The SAR register is a 12-bit register that sets voltage tap data whose values from the array match the voltage values
of the analog input pins, 1 bit at a time starting from the most significant bit (MSB).
If data is set in the SAR register all the way to the least significant bit (LSB) (end of A/D conversion), the contents of
the SAR register (conversion results) are held in the A/D conversion result register (ADCR). When all the specified
A/D conversion operations have ended, an A/D conversion end interrupt request signal (INTAD) is generated.
The A/D conversion result is loaded from the successive approximation register to this register each time A/D
conversion is completed, and the ADCR register holds the A/D conversion result in its higher 10 bits (the lower 6 bits
are fixed to 0).
The A/D conversion result is loaded from the successive approximation register to this register each time A/D
conversion is completed, and the ADCRH register stores the higher 8 bits of the A/D conversion result.
This circuit controls the conversion time of an input analog signal that is to be converted into a digital signal, as well
as starting and stopping of the conversion operation. When A/D conversion has been completed, this controller
generates INTAD.
This pin inputs the reference voltage of the A/D converter, the programmable gain amplifier, the power supply pins
and A/D converter of the comparator, and the comparator. When all pins of ports 2, 15, and 8 are used as the analog
port pins, make the potential of AV
and 8 are used as the digital port pins, make AV
The analog signal input to the ANI0 to ANI15 pins is converted into a digital signal, based on the voltage applied
across AV
This is the ground potential pin of the A/D converter. Always use this pin at the same potential as that of the V
even when the A/D converter is not used.
Remark ANI0 to ANI9: 78K0R/KC3-L (40-pin, 44-pin)
REF
SS
pin
pin
REF
ANI0 to ANI10: 78K0R/KC3-L (48-pin) and 78K0R/KD3-L
ANI0 to ANI11: 78K0R/KE3-L, 78K0R/KF3-L
ANI0 to ANI15: 78K0R/KG3-L
and AV
SS
.
REF
be such that 1.8 V ≤ AV
REF
the same potential as V
REF
≤ V
DD
. When one or more of the pins of ports 2, 15,
DD
.
CHAPTER 13 A/D CONVERTER
SS
553
pin