UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 614

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Address: F0134H, F0135H
Address: F0174H, F0175H
Address: F0220H, F0221H
SOL2
(13) Serial output level register m (SOLm)
Symbol
Symbol
Symbol
SOL0
SOL1
The lower 8 bits of the SOLm register can be set with an 8-bit memory manipulation instruction with SOLmL.
Caution Be sure to clear bits 15 to 3, and 1 of the SOL0 and SOL1 registers, bits 15 to 1 of the SOL2
Note
Remark m: Unit number (m = 0 to 2), n: Channel number (n = 0 to 2)
The SOLm register is a register that is used to set inversion of the data output level of each channel.
This register can be set only in the UART mode. Be sure to set 0000H in the CSI mode and simplifies I
Inverting channel n by using this register is reflected on pin output only when serial output is enabled (SOEmn =
1). When serial output is disabled (SOEmn = 0), the value of the SOmn bit is output as is.
Rewriting the SOLm register is prohibited when the register is in operation (when SEmn = 1).
The SOLm register can be set by a 16-bit memory manipulation instruction.
Reset signal generation clears the SOLm register to 0000H.
Note
SOL
mn
15
15
15
0
1
0
0
0
register to “0”.
SOL2 register is only mounted in the 78K0R/KF3-L (
PD78F1029, 78F1030).
78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L:
78K0R/KF3-L (
78K0R/KF3-L (
78K0R/KG3-L (
78K0R/KG3-L (
Communication data is output as is.
Communication data is inverted and output.
14
14
14
0
0
0
Figure 14-17. Format of Serial Output Level Register m (SOLm)
After reset: 0000H
After reset: 0000H
After reset: 0000H
13
13
13
0
0
0
μ
μ
μ
μ
Selects inversion of the level of the transmit data of channel n in UART mode
12
12
12
PD78F1010, 78F1011, 78F1012) :
PD78F1027, 78F1028) :
0
0
0
PD78F1013, 78F1014) :
PD78F1029, 78F1030) :
11
11
11
0
0
0
R/W
R/W
R/W
10
10
10
0
0
0
9
0
9
0
9
0
8
0
8
0
8
0
7
0
7
0
7
0
μ
6
0
6
0
6
0
PD78F1027, 78F1028) and 78K0R/KG3-L (
mn = 00 to 02
mn = 00 to 02, 10, 12
mn = 00 to 02, 10, 12, 20
mn = 00 to 02, 10, 12
mn = 00 to 02, 10, 12, 20
CHAPTER 14 SERIAL ARRAY UNIT
5
0
5
0
5
0
4
0
4
0
4
0
3
0
3
0
3
0
SOL
SOL
02
12
2
2
2
0
1
0
1
0
1
0
2
C mode.
SOL
SOL
SOL
00
10
20
0
0
0
614
μ