UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 400

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Remark
78K0R/Kx3-L
Note This indicates the value read from the TCRmn register when channel n has stopped operating as a timer (TEmn = 0)
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Interval timer
mode
Capture mode
Event counter
mode
One-count mode
Capture & one-
count mode
Operation Mode
The TCRmn register read value differs as follows according to operation mode changes and the operating status.
and has been enabled to operate as a counter (TSmn = 1). The read value is held in the TCRmn register until the
count operation starts.
The count value can be read by reading timer/counter register mn (TCRmn).
The count value is set to FFFFH in the following cases.
• When the reset signal is generated
• When the TAU0EN bit (in case of TAU0) or TAU1EN bit (in case of TAU1) of peripheral enable registers 0, 2
• When counting of the slave channel has been completed in the PWM output mode
• When counting of the master/slave channel has been completed in the one-shot pulse output mode
• When counting of the slave channel has been completed in the multiple PWM output mode
The count value is cleared to 0000H in the following cases.
• When the start trigger is input in the capture mode
• When capturing has been completed in the capture mode
Caution The count value is not captured to timer data register mn (TDRmn) even when the TCRmn
(PER0, PER2) are cleared
m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7)
78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L: mn = 00 to 07
78K0R/KF3-L, 78K0R/KG3-L:
Table 8-2. Timer/counter Register mn (TCRmn) Read Value in Various Operation Modes
register is read.
Count down
Count up
Count down
Count down
Count up
Count Mode
Value if the
operation mode
was changed after
releasing reset
FFFFH
FFFFH
FFFFH
0000H
0000H
Timer/counter register mn (TCRmn) Read Value
mn = 00 to 07, 10 to 13
Value if the
operation mode was
changed after count
operation paused
(TTmn = 1)
Undefined
Undefined
Undefined
Undefined
Undefined
Value if the
Operation was
restarted after count
operation paused
(TTmn = 1)
CHAPTER 8 TIMER ARRAY UNIT
Stop value
Stop value
Stop value
Stop value
Stop value
Note
Value when waiting
for a start trigger
after one count
Capture value of
TDRmn register + 1
FFFFH
−
−
−
400